A wireless communication apparatus uses a sampling mixer, which temporally discretizes a signal and performs frequency conversion and filtering. With a conventional sampling mixer, signals subjected to digital modulation are sampled in a sampling circuit, and a filtering effect is provided by a switched capacitor incorporated in a sampling circuit (e.g. see Patent Document 1 and Patent Document 2).
FIG. 1 is a circuit diagram of sampling mixer 600 disclosed in Patent Document 1 and Patent Document 2.
In FIG. 1, sampling mixer 600 is provided with: TA (Transconductance Amplifier) 1 that converts received radio frequency (“RF”) signals into RF current iRF; in-phase mixer section 2 that performs frequency conversion of RF current iRF converted in TA 1 by sampling; reverse-phase mixer section 3 combined with in-phase mixer section 2; and DCU (Digital Control Unit) 4 that generates control signals for in-phase mixer section 2 and quadrature-phase mixer section 3.
In-phase mixer section 2 contains sampling switch 5 and Ch (which stands for “history capacitor”) 6 that temporally continuously integrates signals sampled in this sampling switch 5. Further, in-phase mixer section 2 contains a plurality of Cr's (which stand for “rotating capacitors”) 7 to 14 that repeat integrating and releasing signals sampled in sampling switch 5, and Cb (which stands for “buffer capacitor”) 15 that temporarily stores signals released from Cr's 7 to 14.
Further, in-phase mixer section 2 contains dump switch 16 that releases signals stored in Cr's 7 to 14 to Cb 15, reset switch 17 that resets signals stored in Cr's 7 to 14 after the release, and a plurality of integration switches 18 to 25 that connect Ch 6 with Cr's 7 to 14 in order. Further, in-phase mixer section 2 contains a plurality of release switches 26 to 33 that connect Cb 15 with Cr's 7 to 14 in order, and feedback switches 34 and 35 that control inputs of feedback signals from a DA (Digital-to-Analog) converter to the side of sampling mixer 600. Here, reverse-phase mixer section 3 employs a circuit configuration similar to that of in-phase mixer section 2, except for performing sampling half the period behind in-phase mixer section 2.
In in-phase mixer section 2 of sampling mixer 600 employing the above configuration, RP currents iRF of different timings are accumulated in Cr's 7 to 14, and the accumulated electrical charges are released alternately from the group of Cr's 7 to 10 and the group of Cr's 11 to 14. Thus, by periodically releasing electrical charges accumulated in Cr's 7 to 14, discrete time sample streams are created.
However, alias components occur in the filter characteristics of sampling mixer 600, at frequency intervals matching the operation frequencies of the groups provided in parallel and at frequency intervals matching the overall output frequency of Cr's 7 to 14, which is equivalent to the sum of both operation frequencies. When these alias components occur in the reception band after frequency conversion, a problem arises that the reception sensitivity degrades. Therefore, there is a demand to suppress alias components.
As effective measures to take against alias components in a conventional sampling mixer, there is a method of using, for example, a bandpass filter and removing interference signals that are present in frequencies corresponding to alias components before the sampling mixer receives signals as input.
Also, in an environment where there are desired received signals and interference signals, second-order distortion components occur due to the non-linearity of switches forming sampling mixer 600. If signal transmission characteristics match between in-phase mixer section 2 and reverse-phase mixer section 3, it is possible to cancel second-order distortion components by differential combination in a subsequent circuit of sampling mixer 600. However, if signal transmission characteristics mismatch between in-phase mixer section 2 and reverse-phase mixer section 3, it is not possible to suppress second-order distortion components upon differential combination. As a result, second-order distortion components remain in a received signal band after frequency conversion, which causes the degradation of reception sensitivity. Therefore, there is also a demand to suppress second-order distortion components.
To suppress second-order distortion components in a conventional sampling mixer, the positive-phase circuit and negative-phase circuit in a differential circuit configuration are designed to be symmetrical.    Patent Document 1: Japanese Patent Application Laid-Open Number 2004-289793 (pages 6 to 9, FIG. 3, FIG. 3b and FIG. 4)    Patent Document 2: U.S. Patent Application Publication Number 2003/0083033, specification, “SAMPLING MIXER WITH ASYNCHRONOUS CLOCK AND SIGNAL DOMAINS”